SAP 2 Computer Architecture and Assembly Language Programming
SAP 2 computer is designed by A. Malvino which is far more advanced than the SAP 1 computer. SAP 2 is 8 bit computer with 64 Kb (62 Kb RAM and 2 Kb ROM) memory and 16 bit w-bus used as both address and data bus.
Components of SAP 2 Computer
SAP-2 has 2 input/output ports: port 1 and port 2. A hexadecimal encoder is connected to port 1. It allows us to enter hexadecimal instructions and data through port 1. The hexadecimal keyboard encoder sends a ready signal to bit 0 of port 2. This signal indicates when the data in port 1 is valid. SERIAL input can be taken from pin 7 of port 2.
Program Counter (PC)
Program Counter can store 16-bit address, therefore it can count from:
PC = 0000 0000 0000 0000 0000
To PC = 1111 1111 1111 1111 1111
i.e., from 0000H to FFFFH.
The low (CLR)’ signal resets the PC before each computer run, so the data processing starts with the instruction stored in memory location 0000H.
MAR and Memory:
During the fetch cycle, the MAR receives 16 bit addresses from PC. The two state MAR output then addressed memory location. The memory has 2K ROM with address 0000H too 07FFH. The ROM contains a program called monitor that initializes the computer on power-up, interprets the keyboard inputs and so on. The rest of memory is 64 K RAM (62 Kb RAM and 2 Kb ROM) with addresses from 0800H to FFFFH.
Memory Data Register (MDR)
The MDR is an 8-bit register to store 8-bit Op-code. An 8-bit Op-code can accommodate 256 instructions. SAP-2 has only 42 instructions are identical with 8080/8085 instructions.
The controller-sequencer produces the control word or micro-instructions that coordinates and direct the computer. SAP-2 has bigger instruction set; the controller-sequencer has more hardware. The control word (CON) or micro-instructions determine how the registers react to the next positive edge dock.
The two-state output of the accumulator goes to the ALU; the three-state output to the W-bus. Therefore, the 8-bit word in the accumulator continuously drives the ALU, but this same word appears on the bus when EA is active.
ALU and Flags
The ALUs are commercially available as integrated circuit (IC). These ALUs have 4 or more control bits that determine arithmetic and logic operation performed on word A and B. The ALU used in SAP-2 includes arithmetic and logic operation. Flag is a flip-flop that keeps track of a changing condition during computer run. The SAP-2 has two flags:
The sign flag is set when the accumulator contents become negative during the execution of some instructions.
The zero flag is set when the accumulator contents are zero.
TMP, B & C Register
These registers are used for holding data during ALU operations. It provides flexibility to the programmers in moving data between the registers. In general B register is used to store second operand while C register is used as counter. TMP register is used internally and not accessible to programmers.
SAP-2 has two output ports: port 3 and port 4. The contents of the accumulator can be loaded into port 3, which drives the hexadecimal display. The contents of the accumulator can also be sent to port 4. The pin 7 of port 4 sends ACKNOWLEDGE signal to the hexadecimal encoder. This ACKNOWLEDGE signal and READY signal are part of a concept called handshaking. The SERIAL OUT signal from pin 0 of port 4 converts parallel data in the accumulator into serial output data.
SAP 2 Assembly Language Programming
Assembly Language programming is a tedious job. We need to know all the available instructions, their corresponding mnemonics as well as the underlying hardware architecture of the programming machine. There are altogether 42 instructions in SAP 2 computer. These instructions are classified into various groups depending upon the type of tasks they do.
Memory Reference Instructions
These instructions access memory for memory read or memory write operation. These instruction include the memory address for the manipulation data in that memory location. The length of these instructions is 3 byte i.e one byte mnemonic and two byte memory address.
Example: LDA address
LDA 2000 H (Loads the accumulator with the data from memory location 2000)
STA 3000 H (Stores the accumulator data to memory location 2000)
These instruction include the immediate data within the instruction. Here the mnemonic is immediately followed by the the data. It is useful when we need to feed data (Operand) directly to the microprocessor without the memory operation.
Example: MVI reg, byte
MVI A,32H (Loads the Accumulator with immediate data 32)
MBI B, 34H ( Loads the B register with immediate data 34)
Data Movement Instructins